Hardware & Software Requirements

• Hardware IODMA enabled in BIOS and in the kernel. Linux SWIOTLB does not guarantee 4K aligned addresses which are required by the current hardware.
  • In BIOS, Intel VT-d or AMD-Vi (AMD IOMMU) virtualization technologies have to be enabled.
  • The Linux support of Intel VT-d is enabled with "intel_iommu=on" kernel parameter (alternative is to build kernel with CONFIG_INTEL_IOMMU_DEFAULT_ON).
  • To check if hardware IOMMU is used run dmesg | grep -e IOMMU -e DMAR -e PCI-DMA
    • Following output indicates enabled hardware IOMMU (good)

      [    0.000000] Intel-IOMMU: enabled
      [    0.124951] dmar: IOMMU 0: reg_base_addr fbffc000 ver 1:0 cap d2078c106f0466 ecap f020df
      [    0.125044] IOAPIC id 0 under DRHD base  0xfbffc000 IOMMU 0
      [    0.125045] IOAPIC id 2 under DRHD base  0xfbffc000 IOMMU 0
      [    0.836366] IOMMU 0 0xfbffc000: using Queued invalidation
      [    0.836370] IOMMU: Setting RMRR:
      [    0.836377] IOMMU: Setting identity map for device 0000:00:1d.0 [0x7ccd2000 - 0x7ccf6fff]
      [    0.836387] IOMMU: Setting identity map for device 0000:00:1a.0 [0x7ccd2000 - 0x7ccf6fff]
      [    0.836390] IOMMU: Prepare 0-16MiB unity mapping for LPC
      [    0.836394] IOMMU: Setting identity map for device 0000:00:1f.0 [0x0 - 0xffffff]
      [    0.836400] PCI-DMA: Intel(R) Virtualization Technology for Directed I/O
      

    • And the following output will be produced if software SWIOTLB is actually used (bad)

      [    1.169614] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
      [    1.169618] Placing 64MB software IO TLB between ffff8800bb766000 - ffff8800bf766000
      [    1.169620] software IO TLB at phys 0xbb766000 - 0xbf766000
      

UFO Documentation

• UFO Camera and HEB registers (update from 30.03.2015 by Lorenzo)
• UFO Camera: List of FPGA Registers and debug LEDs
• UFO Camera operation instructions, required timeouts, etc.
• Short description of UFO Camera data format
• git clone git@ufo.kit.edu:ufo-camera-manual

FPGA and Sensor Documentation

• CMOSIS CMV2000 Datasheet
• Xilinx Virtex-6 ML605 Evaluation Kit
• Virtex-6 DMA Engine Reference Design

Licenses

• North-West Logic DMA (x8, gen2) IP Core for Virtex-6 and the license

Tests

• Test Beam at November 2011