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Opened 9 years ago

Last modified 22 months ago

#244 new defect

With CMOSIS20, no data until reset after about 10,000 frames

Reported by: Suren A. Chilingaryan Owned by: Michele Caselle
Priority: major Milestone:
Component: UFO Camera Version: libuca-1.2
Keywords: Floonse Cc: Matthias Balzer, Suren A. Chilingaryan, Michele Caselle, Matthias Vogelgesang

Description

The CMOSIS20 stops sending data after several 10,000 of frames. Easily reproduced by running 'pci -g --trigger' and requesting 100,000 frames. Afterwards, the data while not come neither with pci streaming nor with frame.sh script. After running Michele's reset.sh everything gets back in norm and streaming works again.

Attachments (0)

Change History (14)

comment:1 Changed 9 years ago by Suren A. Chilingaryan

Component: ApplicationUFO Camera

comment:2 Changed 9 years ago by Suren A. Chilingaryan

Michele was thinking that it is because of the DMA stack i busy and was suggesting to check for 29 bit of status2 and set camera to idle if it is on. It turned out not the case:

status2 = 0x40003001
control = 0x80000201
pci -r dma0
No data is returned by DMA engine

No data if triggered until reset (now happens much more rate whatever is the reason)

Status

-----------------------------
----  S T A T U S ---------
-----------------------------
fb409000:  0000d300  00000000    00000000  00000000
fb409010:  00080000  00000000    00000000  00000000
fb409020:  00000100  00000000    00000000  00000000
fb409030:  00002006  00000000    00000000  00000000
fb409040:  80000201  00000000    00000000  00000000
fb409050:  9549ffff  40003001    00007b02  00000000
fb409060:  00000000  00000000    00000000  00000000
fb409070:  00014000  00014000    00015000  00014000
fb409080:  00000000  00000000    00000000  00000000
fb409090:  00000000  00000000    00000000  00000000
fb4090a0:  00000000  00000000    00000000  00000000
fb4090b0:  00000000  00000000    00000000  00000000
fb4090c0:  00801000  00007f80    00000000  00000000
fb4090d0:  00000000  00000000    00000000  00000000
fb4090e0:  00000000  00000000    00000000  00000000
fb4090f0:  00000000  00000000    00000000  00000000
fb409100:  00001000  00000000    00000000  00000000
fb409110:  14130483  00000000    00000000  00000000
fb409120:  00000f00  00000000    00000000  00000000
fb409130:  00000000  00000000    00000000  00000000
fb409140:  00000001  00000000    00000000  00000000
fb409150:  00000000  00000000    00000000  00000000
fb409160:  00000000  00000000    00000000  00000000
fb409170:  00000001  00000000    00000000  00000000
fb409180:  00000280  00000000    00000000  00000000

40 MHz
Sensor temperature, clock 40 MHz: 46.50 C
FPGA temperature: 42.81 C
MONITOR OK
Version 0, edited 9 years ago by Suren A. Chilingaryan (next)

comment:3 Changed 9 years ago by Suren A. Chilingaryan

Now happens more often. Opinion of Uros

Yes, I see it, and I know why this happens.
Since the tail is missing, frame_sent signal is not sent to BUSY_FSM and
therefore we have a Busy_DDR signal due to the system thinking there is too many
frames in the DDR, which is also shown in register 91b0.

So, Michele, how would you like to proceed? My guess is that this is probably due
to some failing time constraints..

comment:4 Changed 2 years ago by Floonse

Keywords: Floonse added
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comment:8 Changed 2 years ago by easemiark

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Version: libpco-0.4libuca-1.2

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Version: libuca-1.1libuca-1.0

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comment:14 Changed 22 months ago by almomield

Version: libpco-0.4libuca-1.2

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